features ? minimal component count (base confg: cl8800 + 6 resistors + diode bridge) ? no magnetics, no capacitors ? up to 7.5w output (13w w/ heat sink) ? >110lm/w using effcient leds ? 85% typical electrical effciency ? >0.95 power factor ? <20% thd line current ? low conducted emi w/o flters ? 85% led luminous utilization ? phase dimmer compatible with an rc network applications ? fluorescent tube retroft ? incandescent & cfl bulb replacement ? general led lighting general description the cl8800 is designed to drive a long string of inexpensive, low current leds directly from the ac mains. a basic driver circuit consists of the cl8800, six resistors, and a bridge rectifer. two to four additional components are optional for various levels of transient protection. no capacitors, emi flters, or power factor correction circuits are needed. a string of series/parallel leds is tapped at six locations. six linear current regulators sink current at each tap and are sequentially turned on and off, tracking the input sine wave voltage. voltage across each regulator is minimized when conducting, providing high effciency. output current at each tap is individually resistor- adjustable. cross-regulation, as the cl8800 switches from one regulator to another, provides smooth transitions. the current waveform can be tailored to optimize for input voltage range, line/load regulation, output power/current, effciency, power factor, thd, dimmer compatibility, and led utilization. with the addition of an rc network, the driver is compatible with phase dimming. typical application circuit sequential linear led driver bias gnd cl8800 set1 set2 set3 set4 set5 set 6 ac mains tap1 tap2 tap3 tap4 tap5 tap6 additional component s for 230vac 100 - 120vac transient protection supertex inc. supertex inc. www .supertex.com cl8800 doc.# dsfp-cl8800 d031914
2 absolute maximum ratings parameter value v bias , v tap1 C0.5v to +550v v tap2 C 6 C0.5v to +320v v set1 C 6 4.0v operating junction temperature -55oc to +125oc storage temperature, t s -65c to +150c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. pin confguration product marking ordering information part number package options packing CL8800K63-G 33-lead (6x6) qfn 490/tray CL8800K63-G m935 33-lead (6x6) qfn 2000/reel 33-lead qfn 8800 llllll yyww aaacc c l = lot number yy = year sealed ww = week sealed a = assembler id c = country of origin = ?green? packaging 33-lead qfn (top view) 1 33 set1 nc set2 nc set3 nc set4 nc set5 set6 bias tap1 tap2 tap3 tap4 tap5 tap6 gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd typical thermal resistance package 33-lead qfn 24 o c/w 2.5 o c/w sym parameter min typ max units conditions recommended operating conditions i out output current tap1 - - 60 ma --- tap2 - - 90 tap3 - - 115 tap4 - - 115 tap5 - - 115 tap6 - - 115 v out output voltage tap1 - - 400 v non-conducting tap2-6 - - 300 non-conducting tap1-6 - - (1) conducting v bias applied bias voltage - - 440 v --- (1) voltage capability is determined by power dissipation (v i). -g denotes a lead (pb)-free / rohs compliant package esd sensitive device notes: 1. 1.0oz cu 4-layer board, 3x4 pcb with thermal pad and thermal via array. 2. junction to exposed heat slug. cl8800 supertex inc. www .supertex.com doc.# dsfp-cl8800 d031914
3 sym parameter min typ max units conditions i bias bias pin input current - 250 410 a v bias = 340v i tap(on) output current, on tap1 60 - - ma v tap1 = 30v, v set1~6 = gnd tap2 90 - - v tap2 = 17v, v set1~6 = gnd tap3 115 - - v tap3 = 17v, v set1~6 = gnd tap4 115 - - v tap4 = 17v, v set1~6 = gnd tap5 115 - - v tap5 = 17v, v set1~6 = gnd tap6 115 - - v tap6 = 17v, v set1~6 = gnd i tap(off) output current, off - 0 10 a tap1 - 5, v bias = 312v v reg regulation voltage at set pins set1 - 5 1.80 2.00 2.20 v --- set6 1.89 2.10 2.31 electrical characteristics (over recommended operating conditions at 25c unless specifed otherwise) output current thermal characteristics 250 200 150 100 50 0 i out (ma) -60 -40 -20 0 20 40 60 80 100 120 140 temperature (c) maximum output current ta ps 4&5 ta ps 3&6 ta p 2 ta p 1 6 l p s o l ? h g % o r f n ' l d j u d p bias gnd cl8800 set1 set2 set3 set4 set5 set6 tap1 tap2 tap3 tap4 tap5 tap6 in reg 1 0 in reg 1 0 in reg 1 0 in reg 1 0 in reg 1 0 1 0 22 33 275v ac 10mm 440vdc 1.5kw r set1 r set2 r set3 r set4 r set5 r set6 ac mains additional component s for 230vac 100 - 120vac transient protection cl8800 supertex inc. www .supertex.com doc.# dsfp-cl8800 d031914
4 overview designing a driver to meet particular requirements may be a diffcult task considering the number of design variables (18): tap current (6), number of series-connected leds per segment (6), and the number of parallel-connected leds per segment (6). manually selecting values will provide light, but the chosen values may be far from optimal in regards to effciency, led utilization, line regulation, etc. contact your nearest supertex field applications engineer for design assistance. mathcad and excel worksheets are available by contacting apps@supertex.com . i n addition to confguring the driver, several circuits may be employed to increase reliability, performance, and cost. the following sections briefy describe these circuits. transient protection since the driver circuits have no need for capacitors that could otherwise absorb transient energy, nor is there a need for emi flters that would block transients, the full burden of transient protection is borne by the protection circuit. the two-stage approach in the following schematics provide 2.5kv protection, both pulse and ring per en 61000-4-5 and en 61000-4-12, six hits each. 100 to 120vac transient protection 230vac transient protection zener substitution zeners may be substituted for leds in the bottom stages. the last 1 or 2 stages contribute little to light output - they are mainly to off-load the adjacent upstream regulator at high line voltages to minimize losses. zener substitution advan - tages include minimizing unlit leds at low line for better light uniformity, better line regulation at high line, fewer leds for lower cost and less pcb area, and fewer board-to-board con - nections. disadvantages include slightly reduced effciency at high line, and additional heat load on the driver board. phase dimming as with any light load, the led lamp might not draw enough current to assure proper dimmer operation. this is especial - ly true for 230vac dimmers. triacs used in dimmers require a minimum latching current when triggered to place the triac in the latched-on state. once latched, a minimum holding current is required to maintain the triac in the on state. latch - ing current is many times greater than the holding current, and is the main concern with dimmer compatibility. higher latching current can be provided by a simple series rc network across the ac line. a short time constant pro - vides a current spike at the turn-on edge. less common is inadequate holding current. the minimum dimmer holding current is typically 10-20ma. tap1 at 60ma (max) exceeds the minimum. flicker twice per ac line cycle the line voltage crosses zero volts, during which time there is no light output. the circuit below can provide 5-10% valley fll. it has little effect on input current waveshape (thd, pf) and effciency. power boost higher output power can be achieved by off-loading a por - tion of the power dissipation from the cl8800 to external fets. the circuit below drops most of the tap voltage across the fets, thereby shifting the bulk of the dissipation to the fet. 22 150v ac 10mm a c line 22 33 275v ac 10mm 440vdc 1.5kw a c line bridge rectifier ac line t ransient protection 500 100 - 200nf tap6 tap7 to leds to leds 200k 15v cl8800 supertex inc. www .supertex.com doc.# dsfp-cl8800 d031914
5 valley fill circuit bias cl8800 set1 set2 set3 set4 set5 set 6 gnd tap1 tap2 tap3 tap4 tap5 tap6 c f1 q f2 dn313 5 r f3 r f2 150k r f1 10k q f1 optional flicke r reduction circuit (valley fill) r s1 r s2 r s3 r s4 r s6 r s5 cl8800 supertex inc. www .supertex.com doc.# dsfp-cl8800 d031914
6 pin description pin # pin name description 1 - 8 gnd circuit common (use for heat sink ground plane pass through). 9 set1 current sense for linear current regulators for each tap. resistors on these pins sets the tap currents. 10 nc no internal connection. 11 set2 current sense for linear current regulators for each tap. resistors on these pins sets the tap currents. 12 nc no internal connection. 13 set3 current sense for linear current regulators for each tap. resistors on these pins sets the tap currents. 14 nc no internal connection. 15 set4 current sense for linear current regulators for each tap. resistors on these pins sets the tap currents. 16 nc no internal connection. 17 set5 current sense for linear current regulators for each tap. resistors on these pins sets the tap currents. 18 set6 current sense for linear current regulators for each tap. resistors on these pins sets the tap currents. 19 - 20 gnd circuit common (use for heat sink ground plane pass through). 21 gnd circuit common. connect to bridge rectifer return (use for heat sink ground plane pass through). 22 - 26 gnd circuit common (use for heat sink ground plane pass through). 27 tap6 current regulator outputs. connect to taps along the led string. 28 tap5 29 tap4 30 tap3 31 tap2 32 tap1 33 bias provides bias for driver. connect to rectifed ac. underside plate (gnd) for heatsinking purposes, it should be soldered to a 4.0cm 2 exposed copper area. it should also be electrically connected to circuit common (gnd). note: he high voltage pins are located on one side o the pacage and are arranged rom lowest voltage to highest. intopin voltage gradients are mini mied. cl8800 supertex inc. www .supertex.com doc.# dsfp-cl8800 d031914
7 (the package drawings in this data sheet may not refect the most current specifcations. for the latest package outline information go to http://www.supertex.com/packaging.html .) 33-lead qfn package outline (k6) 600x600mm body 100mm height (max) 00mm pitch notes 1. a pin 1 identifer must be located in the index area indicated. the pin 1 identifer can be: a molded mark/identifer; an embedded metal marker; or a printed indicator. 2. depending on the method of manufacturing, a maximum of 0.15mm pullback (l1) may be present. 3. the inner tip of the lead may be either rounded or square. 4. there will be an exposed dap. a minimum of 0.7mm spacing will be maintained between the leads and the dap. seating plane t op vi ew side v iew bottom v iew d e e2 v iew b vi ew b 1 note 3 note 2 note 1 (index area d/2 x e/2) 33 1 33 d2 0.70mm (min) note 4 e b l1 l a a1 a3 note 1 (index area d/2 x e/2) symbol a a1 a3 b d d2 e e2 e l l1 o dimension (mm) min 0.80 0.00 0.20 ref 0.18 5.85 4.00 5.85 3.60 0.50 bsc 0.30 0.00 0 nom 0.90 0.02 0.25 6.00 4.15 6.00 3.75 0.40 - - max 1.00 0.05 0.30 6.15 4.25 6.15 3.85 0.50 0.15 14 ain not to cale. upete oc. dspd-33qfnk636x6p050, version a021312. supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate ?product liability indemnification insurance agreement.? supertex inc. does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. (website: http//www .supertex.com) ?2014 supertex inc. all rights reserved. unauthorized use or reproduction is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com cl8800 doc.# dsfp-cl8800 d031914
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